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HT6571
Multiple RS-232 Drivers And Receivers
Features
* * *
Single-chip with easy interface between UART and serial port connector Three drivers and five receivers meet or exceed the requirements of EIA/TIA-232-D Driver output slew rate limited to 30V/s max.
* * *
Driver current-limited output: 10mA typ. Flexible supply voltage range ESD protection exceeds 3kV
General Description
The HT6571 is a CMOS device containing three RS-232 line drivers, and five RS-232 line receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE).
Pin Assignment
Block Diagram
1
2nd Aug '95
HT6571
Absolute Maximum Ratings
Supply Voltage (VSS VDD) .............. -15V~15V Supply Voltage (GND VCC) ........... -0.3V~5.5V Input Voltage Driver .............................. 0V~7V Receiver .................... -15V~15V Output Voltage Driver ..................... -15V~15V Receiver ....................... 0V~7V
Electrical characteristics
Symbol
VDD VSS VCC VIH1 VIL1 VIH2 VIL2 IOH1 IOL1 IOS(H) IOS(L) SR1
Paremeter
Operation Voltage Operation Voltage Operation Voltage Driver Input High Driver Input Low Receiver Input High Receiver Input Low Receiver Output Source Current Receiver Output Sink Current High-level Driver Short Current Low-level Driver Short Current Slew Rate -- -- --
Test Condition VDD VCC
-- -- -- 5V 5V 5V 5V 5V 5V 5V 5V 5V VO=2.4V VO=0.4V VO=0V VO=0V RL=7K, C1=50pF
Min. Typ. Max. Unit
7.5 -7.5 4.5 2 -- -- -- -1 +1 -6 30 -- 9 -9 5 -- -- 3 2 -2 +2 -10 40 3 15 -15 5.5 -- 0.8 -- -- -3 +3 -12 50 -- V V V V V V V mA mA mA mA V/s
Condition
-- -- --
12V 12V 12V 12V 12V 12V 12V 12V 12V
2
2nd Aug '95
HT6571
IDERSTZ 220 C2 RTS1Z DTR1Z TXD1 SINTR1 SINTR2 CTS2Z DSR2Z DCD2Z 1000P SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 IOWZ IORZ HIRQ SA1 SA0 IOCS16Z IOCS16Z HCS1Z DDCSSTDR CSTIIXTT DRSNNDRS 222TT111 ZZZRR ZZ 21 RR SSSSXI DDDDD1 3 2 1 0 1 Z VCC SSSS DDDD 7654 SA2 HCS1Z HCS0Z
R7 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
HDD VCC RP4 1 2 3 4 5 6 7 8 9 4.7K 1 2 3 4 5 6 7 8 9 10 11 12 13 RXD1 RI1Z 19999999999888888888 09876543210987654321 0 RI2Z RXD2 RTS2Z DTR2Z TXD2 SEL BIT6 BIT7 RI2Z RXD2 RTS2Z DTR2Z TXD2 SEL BIT6 BIT7 HCS0Z BIT4 BIT5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 BIT4 BIT5 C5 .1U IRQ6 DRQ2 RESET DACK2Z TC TIMEA TIMEB TIMEC TIMED IORZ IOWZ AEN IRQ6 DRQ2 IDERSTZ RESET DACK2Z TC TIMEA TIMEB TIMEC TIMED IORZ IOWZ AEN C6 .1U U? 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 VCC C15 .1U DCD1Z DSR1Z CTS1Z SLCT DCD1Z DSR1Z CTS1Z PE BUSY ERRORZ ACKZ PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 IRQ7 IRQ7
SD[0..15]
SD[0..15] IOWZ IORZ HIRQ R6
PRINT
HDD LED VCC 12 330
14 15 16 17 18 19 20 21 22 23 24 25
HCS0Z VCC
R5 200K X1 24M C4 5P C3 5P
DDCSSTDRGSSSSVSSSSRR C S T I I X T T N D D D D D D D D D X I DCD1Z RI2Z D R S N N D R S D 7 6 5 4 D 3 2 1 0 D 1 DSR1Z RXD2 1Z 222TT 11 RTS2Z Z Z Z R R 1 Z Z CTS1Z Z DTR2Z SLCT 21 TXD2 PE SEL /GAMECSZ BUSY BIT6/PDRQ ERRORZ BIT7/PDACKZ ACKZ HCS1Z PD7 HCS0Z PD6 BIT4 PD5 BIT5 PD4 VDD GND CLKO PD3 CLKI PD2 GND PD1 FINTR PD0 HT-6550A/HT-6552 DRQ VDD IDERSTZ PINTR PWRGD AUTOFDZ RESET INITZ DACKZ SLCTINZ TC STROBEZ TIMEA DSKCHGZ TIMEB RDZ TIMEC/SA10 WPZ TIMED/IORDY TRK0Z S IORZ INDEXZ RDDMM DT IOWZ GND SSSSSSSSSSWSSOOGIEHW AEN WEZ AAAAAAAAAAC1010NRPSD 9876543210ZZZZZDZZZZ 33333333344444444445 12345678901234567890
DB25
AUTOFDZ INITZ SLCTINZ STROBEZ C27 VCC 654321 HT-6550A SSSSSSSSSSRDDMM AAAAAAAAAAWSSOO 9876543210C1010 ZZZZZ DSHW ITSD REZZ ZP Z W E Z INDEXZ T RWR KPD 0ZZ Z D S K C H G Z RP1 150 VCC C23 R1 2.2K C22 C21 MO0Z C20 1111122222333 24680246802468024 FDC 13579111112222233 135791357913 222X8 C26 C25 C24
Application Circuit
SA[0..9]
SA[0..9]
3
2nd Aug '95
HT6571
VCC SD[0..15] C16 .1U NRXD1 NCTS1Z NDSR1Z NTXD1 NDTR1Z NDCD1Z NRTS1Z NRI1Z RXD1 CTS1Z DSR1Z TXD1 DTR1Z DCD1Z RTS1Z RI1Z HIRQ IRQ14 VCC SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 C17 .1U 1 2 3 4 5 6 7 8 9 10 VCC RXD CTSZ DSRZ TXD DTRZ DCDZ RTSZ RIZ GND RXD2 CTS2Z DSR2Z TXD2 DTR2Z DCD2Z RTS2Z RI2Z RXD2 CTS2Z DSR2Z TXD2 DTR2Z DCD2Z RTS2Z RI2Z 1000P RESET RESET C1 DRQ2 12V 12V C18 .1U 10U IOWZ IORZ DACK3Z DRQ3 DACK1Z DRQ1 IRQ7 IRQ6 SINTR1 SINTR2 DACK2Z TC BALE .1U C19 C30 IOWZ IORZ DACK3Z DRQ3 DACK1Z DRQ1 IRQ7 IRQ6 SINTR1 SINTR2 DACK2Z TC BALE DRQ2 -12V U3 VDD NRXD NCTSZ NDSRZ NTXD NDTRZ NDCDZ NRTSZ NRIZ VSS HT-6571 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 VCC RXD CTSZ DSRZ TXD DTRZ DCDZ RTSZ RIZ GND RXD1 CTS1Z DSR1Z TXD1 DTR1Z DCD1Z RTS1Z RI1Z IOCS16Z U2 VDD NRXD NCTSZ NDSRZ NTXD NDTRZ NDCDZ NRTSZ NRIZ VSS HT-6571 20 19 18 17 16 15 14 13 12 11 IOCS16Z [D] [C] J9 19 D1 1 C1 20 D2 2 C2 21 D3 3 C3 22 D4 4 C4 23 5 C5 24 D5 6 C6 25 D6 7 C7 26 D7 8 C8 27 D8 9 D9 C9 28 D10 C10 10 29 D11 C11 11 30 D12 C12 12 31 D13 C13 13 32 D14 C14 14 33 D15 C15 15 34 D16 C16 16 35 D17 C17 17 36 D18 C18 18 SLOT-36P [B] [A] J10 32 1 A1 SD7 33 B1 2 A2 SD6 34 B2 3 A3 SD5 35 B3 4 A4 SD4 36 B4 5 B5 A5 SD3 37 B6 6 A6 SD2 38 B7 7 A7 SD1 39 B8 8 A8 SD0 40 B9 9 A9 10 41 A10 11 CHRDY CHRDY AEN 42 B10 A11 12 AEN 43 B11 A12 13 44 B12 A13 14 45 B13 B14 A14 46 B15 A15 15 47 B16 A16 16 48 B17 A17 17 49 B18 A18 18 50 19 A19 20 51 B19 A20 21 52 B20 A21 22 SA10 53 B21 SA9 A22 23 54 B22 SA8 A23 24 55 B23 SA7 B24 A24 56 B25 SA6 A25 25 57 B26 SA5 A26 26 58 B27 SA4 A27 27 59 B28 SA3 A28 28 60 SA2 A29 29 GBIT6 61 B29 SA1 B30 A30 30 62 B31 SA0 A31 31 SLOT-62P SA[0:10] SA[0..10] GBIT7 COM1 VCC NRI1Z NDTR1Z NCTS1Z NTXD1 NRTS1Z NRXD1 NDSR1Z NDCD1Z NRI1Z NDTR1Z NCTS1Z NTXD1 NRTS1Z NRXD1 NDSR1Z NDCD1Z 5 9 4 8 3 7 2 6 1 NDCD2Z NTXD2 2 4 6 8 10 NRTS2Z NRI2Z NDCD2Z NTXD2 GTIMEC NRTS2Z NRI2Z RP5 4.7K VCC VCC 12345 J6 1-2 2-3 J11-J14: 1-2 HT-6550A HT-6550A: HT-6552: UART1 DISABLE COM1 DISABLE COM1 COM3 DISABLE COM2 COM2 J9 1-2 1-2 2-3 2-3 J10 1-2 2-3 1-2 2-3 UART2 DISABLE DISABLE COM2 COM2 COM4 COM1 DISABLE COM1 J7 1-2 1-2 2-3 2-3 J8 1-2 2-3 1-2 2-3 UART1 COM1 COM2 COM3 DISABLE UART2 COM2 COM1 COM4 DISABLE J15-J16: 1-2 DMA1 J15-J16: 2-3 DMA3 J17 1-2 1-2 2-3 2-3 J18 1-2 2-3 1-2 2-3 LPT MODE EPP+ECP EPP ECP SPP C7 .O1U C8 .01U C9 .01U RP6A 2.2K J7 2-3 1-2 2-3 1-2 2-3 1-2 2-3 1-2 J10: 1-2 J8 2-3 2-3 1-2 1-2 2-3 2-3 1-2 1-2 J9 2-3 2-3 2-3 2-3 1-2 1-2 1-2 1-2 IDE PORT ENABLE DISABLE J11-J14: 2-3 HT-6552 9 10 11 12 13 14 15 16 RP6B 2.2K GAME 1 2 3 4 5 6 7 8 BIT4 BIT5 GBIT6 GBIT7 BIT4 BIT5 GBIT6 GBIT7 DRQ3 DRQ3 123 J15 DACK3Z DACK3Z 123 J16 VCC C11 C13 C12 C14 RP6C RP6D .1U .1U .1U 2.2K 2.2K .1U TIMEA TIMEB GTIMEC GTIMED C10 .01U R9 10K 123 J17 TIMEA TIMEB GTIMEC GTIMED R11 10K 123 J18 R10 10K PDMARQ PDRQ VCC PDMARQ PDRQ R8 10K CHRDY IORDY CHRDY IORDY PDACKZ DACK1Z PDACKZ DACK1Z J14 PDMARQ PDMARQ DRQ1 RDQ1 GTIMED VCC RP3B RTS2Z 1K 123 J1 123 J2 123 J3 123 J4 123 J5 123 J6 123 J7 123 J8 123 J9 123 J10 GBIT6 123 J11 GBIT7 123 J12 GTIMEC 123 J13 GTIMED 123 TIMED IORDY TIMED IORDY TIMEC TIMEC SA10 SA10 BIT7 BIT7 PDACKZ PDACKZ BIT6 PDRQ BIT6 PDRQ RP2A DTR2Z 1K R3 4.7k RP3C 1K R2 2.2K R4 4.7K RP2B 1K RP2C 1K RP2D TXD1 1K RP3A 1K RTS2Z SD[0..15]
NRXD1 NCTS1Z NDSR1Z NTXD1 NDTR1Z NDCD1Z NRTS1Z NRI1Z
DTR2Z
HCS1Z
HCS1Z
TXD2
TXD2
NRXD2 NCTS2Z NDSR2Z NTXD2 NDTR2Z NDCD2Z NRTS2Z NRI2Z
NRXD2 NCTS2Z NDSR2Z NTXD2 NDTR2Z NDCD2Z NRTS2Z NRI2Z
MO0Z
MO0Z
HCS0Z
HCS0Z
RTS1Z
RTS1Z
DTR1Z
DTR1Z
TXD1
SEL
C28 10U 10U
C29
J1 2-3 1-2 2-3 1-2 J3 1-2 2-3 J4 1-2 2-3 J5 1-2 2-3 FDC PORT ENABLE DISABLE GAME PORT ENABLE DISABLE NRXD2 NDTR2Z NDSR2Z NCTS2Z NRXD2 NDTR2Z NDSR2Z NCTS2Z IDE PORT PRIMARY PORT SECONDARY PORT COM2 1 3 5 7 9
J2 2-3 2-3 1-2 1-2
LPT PORT DISABLE PRT1(3BC-3BFH) PRT2(378-37BH) PRT3(278-27BH)
4
SEL
2nd Aug '95

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